2015
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A Probabilistic Three-Phase Time Domain Electric Arc Furnace Model based on analytical method
A Probabilistic Three-Phase Time Domain Electric Arc Furnace Model based on analytical method
2
2
An electric arc furnace (EAF) is known as nonlinear and time variant load that causes power quality (PQ) problems such as, current, voltage and current harmonics, voltage flicker, frequency changes in power system. One of the most important problems to study the EAF behavior is the choice of a suitable model for this load. Hence, in this paper, a probabilistic three-phase model is proposed based on recovered hidden Markov model (RHMM) in time domain. To recover the HMM , the coupling factor is proposed. This factor estimates the past observations and considers the effects of all observations in different states. Regarding to the intense fluctuations of various parameters of EAF, this factor can improve the EAF model in different operating stages. This subject causes that the proposed model is closed to the actual model. To train the RHMM, actual measured samples are used. Likewise, different parameters of EAF' power system as, flexible cables, electrode, busbar are exactly considering to achieve an accurate model. Comparing the results of experimental and proposed model indicates the accuracy of the proposed model.
1
An electric arc furnace (EAF) is known as nonlinear and time variant load that causes power quality (PQ) problems such as, current, voltage and current harmonics, voltage flicker, frequency changes in power system. One of the most important problems to study the EAF behavior is the choice of a suitable model for this load. Hence, in this paper, a probabilistic three-phase model is proposed based on recovered hidden Markov model (RHMM) in time domain. To recover the HMM , the coupling factor is proposed. This factor estimates the past observations and considers the effects of all observations in different states. Regarding to the intense fluctuations of various parameters of EAF, this factor can improve the EAF model in different operating stages. This subject causes that the proposed model is closed to the actual model. To train the RHMM, actual measured samples are used. Likewise, different parameters of EAF' power system as, flexible cables, electrode, busbar are exactly considering to achieve an accurate model. Comparing the results of experimental and proposed model indicates the accuracy of the proposed model.
1
10
M.
Torabian Esfahani
M.
Torabian Esfahani
PhD. Student, Department of Electrical Engineering, Amirkabir University of Technology, Tehran, Iran
PhD. Student, Department of Electrical Engineering
Iran
B
Vahidi
B.
Vahidi
Professor, Department of Electrical Engineering, Amirkabir University of Technology, Tehran, Iran
Professor, Department of Electrical Engineering,
Iran
Recovered Hidden Markov Model
Electric Arc Furnace
Voltage Flicker
Power Quality parameters
[[1] M. Alonso, M. Donsion, “An Improved Time Domain Arc Furnace Model for Harmonic Analysis”, IEEE Trans. Power Del., vol. 19, No. 1, pp.367- 373, 2004.##[2] S. G. Deaconu, N. Popa, A. I. Toma, M. Topor, “Modeling and Experimental Analysis for Modernization of 100-t EAF”, IEEE Trans. on Ind. App. vol. 46, No. 6, pp.2259- 2266, 2010.##[3] S. M. Mousavi Agah, S. H. Hosseinian, H. Askarian Abyaneh, N. Moaddabi, “Parameter Identification of Arc Furnace Based on Stochastic Nature of Arc Length Using Two-Step Optimization Technique”, IEEE Trans. on Power Del., vol. 25, No. 4, pp. 2859- 2867, 2010.##[4] I. Vervenne, K. Van Reusel, R. Belmans, “Electric Arc Furnace Modeling from a “Power Quality” Point of View”, Electrical Power Quality Utilization IEEE Int. Conf., pp. 1-6, 2007.##[5] W. Ting, S. Wennan, Z. Yao, “A New Frequency Domain Method for the Harmonic Analysis of Power Systems with Arc Furnace”, Advances in Power System Control, Operation and Management IEEE Int. Conf., pp. 552- 555, 1997.##[6] L. F. Beites, J. G. Mayordomo, A. Hernandes, R. Asensi, “Harmonics, Interharmonic, Unbalances of Arc Furnaces: a New Frequency Domain approach”, IEEE Trans. Power Del., vol. 16, No. 4 pp. 661- 668, 2001.##[7] L. F. Pak, V. Dinavahi, G. Chang, M. Steurer, P. F. Ribeiro, “Real-Time Digital Time- Varying Harmonic Modeling and Simulation Techniques”, IEEE Trans. Power Del., vol. 22, No. 2 pp. 1218- 1227, 2007.##[8] M. Torabian Esfahani, B. Vahidi, “A New Stochastic Model of Electric Arc Furnace Based on Hidden Markov Model: A Study of Its Effects##on Power System”, IEEE Trans. Power Del., vol. 27, No. 4 pp. 1893- 1901, 2012.##[9] D. Grabowski, J. Walczak, ”Deterministic model of electric arc furnace – a closed form solution”, COMPEL: The International Journal for Computation and Mathematics in Electrical and Electronic Engineering vol. 32 No. 4, pp. 1428- 1436, 2013.##[10] Y. Hsu, K. H. Chen, P. Huang, Ch. Lu, “Electric Arc Furnace Voltage Flicker Analysis and Prediction” IEEE Trans. on Ins. and Meas., vol. 60, No. 10, pp.3360- 3369, 2011.##[11] A. M. Gonzalez, A. M. S. Roque, J. Garcia-Gonzalez, “Modeling and Forecasting Electricity Prices with Input/Output Hidden Markov Models”, IEEE Trans. Power System, vol. 20, No. 1 pp. 13– 24, 2005.##[12] E. Altıntas, O. Salor, I. Cadirci, M. Ermis, “A New Flicker Contribution Tracing Method Based on Individual Reactive Current Components of Multiple EAFs at PCC”, IEEE Trans. Ind. Appl., vol. 46, No. 5, pp.1746- 1754, 2010.##[13] Testing and Measurement Techniques– Flickermeter, Functional and Design Specifications, IEC Standard, IEC 61000-4-15.##]
Improving the QoS in Intelligent Connected EVSE by Using RPL
Improving the QoS in Intelligent Connected EVSE by Using RPL
2
2
Nowadays, a great portion of researches research and industrial innovation is about the electric vehicles (EV) and also EV Supply Equipment (EVSE) that play an important role in this context. EVSE requires standardization via effective communication protocols. In this paper, we propose to customize the existing Internet standard Routing Protocol for Low Power and Lossy Networks (RPL) to facilitate the communication among networked EVSEs. RPL is a flexible protocol that has special specifications to support many low power and lossy nodes, which makes it self-healing and ideal to support the differing traffic activity in EVSE systems. Our idea to improve the Quality of Service (QoS) in this vehicular network is using classification of data type. Hence , we propose a Customized RPL which support supports classification and also two different Objective Functions (OF) that the simulation results shows show , effectively reduce the end to end delay for special kind of data packets. We study our proposed method under different scenarios to see how successful this idea is.
1
Nowadays, a great portion of researches research and industrial innovation is about the electric vehicles (EV) and also EV Supply Equipment (EVSE) that play an important role in this context. EVSE requires standardization via effective communication protocols. In this paper, we propose to customize the existing Internet standard Routing Protocol for Low Power and Lossy Networks (RPL) to facilitate the communication among networked EVSEs. RPL is a flexible protocol that has special specifications to support many low power and lossy nodes, which makes it self-healing and ideal to support the differing traffic activity in EVSE systems. Our idea to improve the Quality of Service (QoS) in this vehicular network is using classification of data type. Hence , we propose a Customized RPL which support supports classification and also two different Objective Functions (OF) that the simulation results shows show , effectively reduce the end to end delay for special kind of data packets. We study our proposed method under different scenarios to see how successful this idea is.
11
16
M.
Alishahi
M.
Alishahi
Faculty Member, Department of Computer Engineering, Fariman Branch, Islamic Azad University, Fariman, Iran.
Faculty Member, Department of Computer Engineering
Iran
M. H.
Yaghmaee
M. H.
Yaghmaee
Professor, Department of Computer Engineering and Center of Excellence on Soft Computing and Intelligent Information Processing, Ferdowsi University of Mashhad, Mashhad, Iran.
Professor, Department of Computer Engineering
Iran
G.
Wu
G.
Wu
Professor, Department of Electrical Engineering & Information Technology, Tohoku Gakuin University, Tagajo, Japan.
Professor, Department of Electrical Engineering
Iran
RPL
DODAG
QoS
EVSE
[N. Lu, N. Cheng, and N. Zhang, “Connected Vehicles: Solutions and Challenges,” Internet of Things Journal, IEEE, Vol. 1, pp. 289–299, Agust 2014.##M. Majidpour, C. Qiu, P. Chu, R. Gadh, H. R. Pota, “Modified Pattern Sequence-based Forecasting for Electric Vehicle Charging Stations” IEEE International Conference on Smart Grid Communications (SmartGridComm '14), Venice, Italy, 3-6 Nov. 2014 (in press).##M. Alishahi and M. Majidpour “ Proposing a RPL based Protocol for Intelligent Connected Vehicles” International Conferonce on Connected Vehicles and Expo, Vienna, Austria, 3-7 Nov, 2014.##M. Majidpour, C. Qiu, C. Chung, P. Chu, R. Gadh and H. R. Pota, “Fast Demand Forecast of Electric Vehicle Charging Stations for Cell Phone Application” Proceedings of the 2014 IEEE PES General Meeting, 27-31 July. National Harbor, MD, USA. (in press).##T. Winter, P. Thubert, A. Brandt, J. Hui, and R. Kelsey, “RPL: IPv6 Routing Protocol for Low Power and Lossy Networks,” IETF Request for Comments 6550, March 2012.##O. Gaddour, A.Koubaa,”RPL in a nutshell: A survey”, ElSEVIER, Computer network, pp. 3163-3178, July 2012.##P. Thubert, “Objective Function Zero for the Routing Protocol for Low-Power and Lossy Networks (RPL),” IETF RFC 6552, Mar. 2012 ##D.Wang, Z.Tao, J.Zhang, A.Abouzeid, ”RPL Based Routing for Advanced Metering Infrastructure in Smart Grid”, MITSUBISHI ELECTRIC RESEARCH LABORATORIES, 2010.##]
Automatic Discovery of Technology Networks for Industrial-Scale R&D IT Projects via Data Mining
Automatic Discovery of Technology Networks for Industrial-Scale R&D IT Projects via Data Mining
2
2
Industrial-Scale R&D IT Projects depend on many sub-technologies which need to be understood and have their risks analysed before the project can begin for their success. When planning such an industrial-scale project, the list of technologies and the associations of these technologies with each other is often complex and form a network. Discovery of this network of technologies is time consuming for a human to perform, due to the large number of technologies and due to the fact that the technologies are constantly changing. In this paper, a method is provided for the automatic discovery of the network of associations of Industrial IT technologies as a networked graph, using data mining and web-mining algorithms. The proposed process is an approach to form a dynamic weighted graph of technologies. A numeric value is calculated as similarity between technologies. A combination of data mining and web mining techniques have been used to achieve the results. The main objective is to invent a computerized reproducible method so that by the help of it, technological relation can be extracted and updated constantly. This method consists of six phases, of which four phases are performed automatically by novel algorithms introduced in this paper. The analysis of more than 8 million terms suggests that the proposed method provides acceptable results. This paper also provided recommendations to improve the suggested method.
1
Industrial-Scale R&D IT Projects depend on many sub-technologies which need to be understood and have their risks analysed before the project can begin for their success. When planning such an industrial-scale project, the list of technologies and the associations of these technologies with each other is often complex and form a network. Discovery of this network of technologies is time consuming for a human to perform, due to the large number of technologies and due to the fact that the technologies are constantly changing. In this paper, a method is provided for the automatic discovery of the network of associations of Industrial IT technologies as a networked graph, using data mining and web-mining algorithms. The proposed process is an approach to form a dynamic weighted graph of technologies. A numeric value is calculated as similarity between technologies. A combination of data mining and web mining techniques have been used to achieve the results. The main objective is to invent a computerized reproducible method so that by the help of it, technological relation can be extracted and updated constantly. This method consists of six phases, of which four phases are performed automatically by novel algorithms introduced in this paper. The analysis of more than 8 million terms suggests that the proposed method provides acceptable results. This paper also provided recommendations to improve the suggested method.
17
22
S.
Azimi
S.
Azimi
Faculty Member, Department of New Sciences & Technology, Tehran University, Tehran, Iran
Faculty Member, Department of New Sciences
Iran
H.
Veisi
H.
Veisi
Assistant Professor, Department of New Sciences & Technology, Tehran University, Tehran, Iran
Assistant Professor, Department of New Sciences
Iran
R.
Rahmani
R.
Rahmani
Assistant Professor, Department of New Sciences & Technology, Tehran University, Tehran, Iran
Assistant Professor, Department of New Sciences
Iran
Technology Mining
Technology Graph
Data Mining
Text Mining
Similarity Algorithms
Web Robots
[[1] Flyvbjerg, Bent, and Alexander Budzier. "Why your IT project may be riskier than you think." Harvard Business Review 89.9 (2011): 601-603.##[2] Yacov Y. Haimes, Risk Modeling, Assessment, and Management, 2005, Wiley Books, 615-629##[3] https://en.wikipedia.org/wiki/NHS_Connecting_for_Health, viewed at 2014##[4] Alan L. Porter, “Technology futures analysis: Toward integration of the field and new methods”, Technological Forecasting & Social Change 71 (2004) 287–303##[5] Alan L. Porter, “Quick Technology Intelligence Processes”, eu-us seminar: new technology foresight, forecasting & assessment methods-seville 13-14 may 2004##[6] Belver c. Griffith –“Mapping the Scientific Literature.” NATO Advances Study Institutes Series Volume 10, 1975, pp 457-481##[7] Melkérs, J., bibliometrics as a Tool for Analysis of R&D impact, in Evaluating R&D impacts: Methods and Pracüce, B. Bozeman and J. Melkers, eds., Kluwer, Boston, 1993, pp. 43-61##[8] Donghua Zhu, Alan Porter, Scott Cunningham, Judith Carlisie, Anustup Nayak. "A process for mining science & technology documents databases", illustrated for the case of "knowledge discovery and data mining". Ci. Inf. vol.28 n.1 Brasilia Jan. 1999##[9] Behrang QasemiZadeh, "Towards Technology Structure Mining from Scientic Literature"##[10] Information Technology Encolopedia, http://whatis.techtarget.com/glossaries, Viewed at 2014##[11] The Tech Terms Computer Dictionary, http://www.techterms.com/, Viewed at 2014##[12] Category:Information technology, http://en.wikipedia.org/wiki/Category:Information_technology, Viewed at 2014##[13] Tech dictionary for IT professionals and educators, www.webopedia.com, Viewed at 2014##[14] Advancing Technology for Humanity, http://www.ieee.org/, Viewed at 2014##[15] Han, Jiawei, Jian Pei, and Yiwen Yin. "Mining frequent patterns without candidate generation." ACM SIGMOD Record. Vol. 29. No. 2. ACM, 2000.##[16] Agrawal, Rakesh, and Ramakrishnan Srikant. "Mining sequential patterns." Data Engineering, 1995. Proceedings of the Eleventh International Conference on. IEEE, 1995.##[17] T. P. Martin and M. Azmi-Murad, An Incremental Algorithm to find Asymmetric Word Similarities for Fuzzy Text Mining, Soft Computing as Transdisciplinary Science and Technology Advances in Soft Computing Volume 29, 2005, pp 838-8##[18] Zhao, Qiankun, and Sourav S. Bhowmick. "Association rule mining: A survey." Nanyang Technological University, Singapore (2003).##]
Design and Simulation of a Modified 32-bit ROM-based Direct Digital Frequency Synthesizer on FPGA
Design and Simulation of a Modified 32-bit ROM-based Direct Digital Frequency Synthesizer on FPGA
2
2
This paper presents a modified 32-bit ROM-based Direct Digital Frequency Synthesizer (DDFS). Maximum output frequency of the DDFS is limited by the structure of the accumulator used in the DDFS architecture. The hierarchical pipeline accumulator (HPA) presented in this paper has less propagation delay time rather than the conventional structures. Therefore, it results in both higher maximum operating frequency and higher maximum output frequency. Ripple Carry Adder (RCA) is used at each stage of Conventional pipeline accumulators, whereas the modified pipeline technique contains Carry Look-ahead Adder (CLA) instead of RCA. The proposed method consists of hierarchical adders that have three parts, two blocks of 4-bit CLA and a separated block to estimate carry bits independently. To reach a better frequency resolution in the DDFS, larger phase accumulator is needed. Moreover, in conventional DDFSs, as the number of phase bits increases, to have non-truncated phase mapping, huge amount of memory will be needed. The trigonometric relations of the sine and the cosine functions are used in the phase mapping technique proposed by Symon in order to reduce the size of the Look Up Table (LUT). The method applied in this work combines quarter wave symmetry of the sine samples, the phase difference between the sine and the cosine samples and trigonometric relations of the sine and the cosine functions to reduce the total memory size. The SFDR of the output wave will remain approximately constant (132 dBc) in comparison with the previous works. Finally, the proposed architecture is simulated on Stratix II FPGA. This structure has the frequency range of 0 to 245 MHz with 0.05 Hertz frequency resolution.
1
This paper presents a modified 32-bit ROM-based Direct Digital Frequency Synthesizer (DDFS). Maximum output frequency of the DDFS is limited by the structure of the accumulator used in the DDFS architecture. The hierarchical pipeline accumulator (HPA) presented in this paper has less propagation delay time rather than the conventional structures. Therefore, it results in both higher maximum operating frequency and higher maximum output frequency. Ripple Carry Adder (RCA) is used at each stage of Conventional pipeline accumulators, whereas the modified pipeline technique contains Carry Look-ahead Adder (CLA) instead of RCA. The proposed method consists of hierarchical adders that have three parts, two blocks of 4-bit CLA and a separated block to estimate carry bits independently. To reach a better frequency resolution in the DDFS, larger phase accumulator is needed. Moreover, in conventional DDFSs, as the number of phase bits increases, to have non-truncated phase mapping, huge amount of memory will be needed. The trigonometric relations of the sine and the cosine functions are used in the phase mapping technique proposed by Symon in order to reduce the size of the Look Up Table (LUT). The method applied in this work combines quarter wave symmetry of the sine samples, the phase difference between the sine and the cosine samples and trigonometric relations of the sine and the cosine functions to reduce the total memory size. The SFDR of the output wave will remain approximately constant (132 dBc) in comparison with the previous works. Finally, the proposed architecture is simulated on Stratix II FPGA. This structure has the frequency range of 0 to 245 MHz with 0.05 Hertz frequency resolution.
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29
P.
Soleimani Abhari
P.
Soleimani Abhari
MSc. Student, Department of Electrical, Biomedical and Mechatronics Engineering, Qazvin Branch, Islamic Azad University, Qazvin, Iran
MSc. Student, Department of Electrical, Biomedical
Iran
M.
Dosaranian Moghadam
M.
Dosaranian Moghadam
Assistant Professor, Department of Electrical, Biomedical and Mechatronics Engineering, Qazvin Branch, Islamic Azad University, Qazvin, Iran
Assistant Professor, Department of Electrical,
Iran
DDFS
SFDR
Trigonometric identities
Phase mapping technique
Pipeline Accumulator
[[1] Ibrahim, S. H., Ali, S. H. M., and Islam, M. S., “Design A 24-Bits Pipeline Phase Accumulator For Direct Digital Frequency Synthesizer”, IEEE 2012 international symposium on instrumentation and measurement sensor network and automation (IMSNA), pp. 393-397, 2012.##[2] Ibrahim, S. H., Ali, S. H. M., and Islam, M. S., “12-Bit High Speed Direct Digital Frequency Synthesizer Based on Pipelining Phase Accumulator Design”, Journal of Asian Scientific Research, vol. 2, no.11, pp. 667-672, 2011. ##[3] Chappell, M. and McEwan, A., “A Low Power High Speed Accumulator for DDFS Applications”, IEEE Proceedings of the 2004 International Symposium on Circuits and Systems, vol.2, pp. 797-800, May 2004.##[4] Vankka, J., “Direct Digital Synthesizers: Theory, Design and Applications”, Helsinki University of Technology Department of Electrical and Communications Engineering Electronic Circuit Design Laboratory, PHD thesis, November 2000.##[5] Alkurwy, S. H., Md Ali, S. H., and Shabiul Islam, Md., “Implementation of Low Power Compressed ROM for Direct Digital Frequency Synthesizer”, IEEE international conference on system science and engineering (ICSSE), pp. 309-312, 2014.##[6] Wang, G., “An FPGA-based Spur-Reduced Numerically Controlled Oscillator”, IEEE international conference on system science and engineering (ICSSE), pp. 187-192, 2012.##[7] Ko, Lu-Ting, Chen, Jwu-E., Shieh, Yaw-Shih, Hsin, Hsi-Chin, and Sung, Tze-Yun, “Difference Equation-Based Digital Frequency Synthesizer”, Mathematical Problems in Engineering, Hindawi, vol. 2012, pp. 1-12, 2012.##[8] Symons, P.R., “DDFS Phase Mapping Technique”, IET, Electronics Letters, vol. 38, no. 21, pp.1291-1292, 2002.##[9] Cardarilli, G.C., D’Alessio, M., Di Nunzio, L., Fazzolari, R., Murgia, D., and Re, M., “FPGA implementation of a low-area/high-SFDR DDFS architecture”, 10th International Symposium on Signals, Circuits and Systems (ISSCS), pp. 1-4, July 2011.##[10] Compton, K., “Carry Lookahead Adders”, Logic and Computer Design Fundamentals (4th Edition), UW-Madison, 2010, http://www.ece.uvic.ca.##]
A Class E Power Amplifier with Low Voltage Stress
A Class E Power Amplifier with Low Voltage Stress
2
2
A new output structure for class E power amplifier (PA) is proposed in this paper. A series LC resonator circuit, tuned near the second harmonic of the operating frequency is added to the output circuit. This resonator causes low impedance at the second harmonic. The output circuit is designed to shape the switch voltage of the class E amplifier and lower the voltage stress of the transistor. The maximum switch voltage of the conventional class E PA is 3.56Vdc. However, higher switch voltage of about 4.5VDC may be occurred, by considering nonlinear drain-to-source capacitance in class E PA. The obtained peak switch voltage of the designed class E PA is approximately 75% of the conventional one with the same conditions, which shows a significant reduction in peak switch voltage. MOSFET parasitic nonlinear gate-to-drain and nonlinear drain-to-source capacitances of the MOSFET body junction diode also affect the switch voltage in class E PA, which are considered in this paper. The actual MOSFETs have these parasitic capacitances; therefore, it is necessary to consider these elements in the design procedure. Reduced switch voltage in class E PA relaxes the breakdown voltage constraints of the active device. In the switch voltage of the designed circuit, the zero voltage and zero derivative switching (ZVS and ZVDS) conditions are satisfied. Simulation of the presented circuit is performed using PSpice and LTspice softwares. For verification of the designed circuit, the presented PA is fabricated and measured.
1
A new output structure for class E power amplifier (PA) is proposed in this paper. A series LC resonator circuit, tuned near the second harmonic of the operating frequency is added to the output circuit. This resonator causes low impedance at the second harmonic. The output circuit is designed to shape the switch voltage of the class E amplifier and lower the voltage stress of the transistor. The maximum switch voltage of the conventional class E PA is 3.56Vdc. However, higher switch voltage of about 4.5VDC may be occurred, by considering nonlinear drain-to-source capacitance in class E PA. The obtained peak switch voltage of the designed class E PA is approximately 75% of the conventional one with the same conditions, which shows a significant reduction in peak switch voltage. MOSFET parasitic nonlinear gate-to-drain and nonlinear drain-to-source capacitances of the MOSFET body junction diode also affect the switch voltage in class E PA, which are considered in this paper. The actual MOSFETs have these parasitic capacitances; therefore, it is necessary to consider these elements in the design procedure. Reduced switch voltage in class E PA relaxes the breakdown voltage constraints of the active device. In the switch voltage of the designed circuit, the zero voltage and zero derivative switching (ZVS and ZVDS) conditions are satisfied. Simulation of the presented circuit is performed using PSpice and LTspice softwares. For verification of the designed circuit, the presented PA is fabricated and measured.
31
37
M.
Hayati
M.
Hayati
Professor, Department of Electrical Engineering, Faculty of Engineering, Razi University, Tagh-E-Bostan, Kermanshah-67149, Iran
Professor, Department of Electrical Engineering,
Iran
S.
Roshani
S.
Roshani
Faculty Member, Department of Electrical Engineering, Kermanshah Branch, Islamic Azad University, Kermanshah, Iran
Faculty Member, Department of Electrical
Iran
Class E Power Amplifier
Low Voltage Stress
MOSFET Parasitic Capacitances
ZVS and ZVDS Conditions
[[1] H. Golestaneh, A. Abdipour, and A.Mohammadi, “Nonlinear modeling and analysisof a Doherty power amplifier driven by nonconstantenvelope signals”, Analog IntegratedCircuits and Signal Processing, vol. 72, No. 1,pp. 141-153. 2012.##[2] M. Majidi, A. Mohammadi, and A. Abdipour,“Analysis of the power amplifier nonlinearity##on the power allocation in cognitive radionetworks”, IEEE Transactions onCommunications, vol. 62, No. 2, pp. 467-477,2014.##[3] M. Hayati, F. Shamma, S. Roshani, and A.Abdipour, “Linearization design method in##class-F power amplifier using artificial neuralnetwork.” Journal of ComputationalElectronics, vol. 13, No. 4, pp. 943-949, 2014.##[4] M. Hayati and S. Roshani, “A novelminiaturized power amplifier with nth harmonicsuppression”, AEU-International Journal ofElectronics and Communications, vol. 68, No.10, pp. 1016-1021, 2014.##[5] M. Vasic, O. Garcia, J. A. Oliver, P. Alou, D.Diaz, R. Prieto, and J. Cobos, “Envelopeamplifier based on switching capacitors forhigh-efficiency RF amplifiers”, PowerElectronics, IEEE Transactions on, vol. 27, No.##3, pp. 1359-1368, 2012.##[6] A. Mediano and N. O. Sokal, “A Class-RFPower Amplifier with a Flat-Top Transistor-Voltage Waveform”, IEEE Transactions onPower Electronics, vol. 28, No. 11, pp. 5215-5221, 2013.##[7] N. O. Sokal and A.D. Sokal, “Class EA newclass of high-efficiency tuned single-endedswitching power amplifiers”, IEEE Journal ofSolid-State Circuits, vol. 10, No. 3, pp. 168-176, 1975.##[8] M. K. Kazimierczuk, RF Power Amplifier,John Wiley & Sons, 2014.##[9] M. J. Chudobiak, “The use of parasiticnonlinear capacitors in class E amplifiers”,IEEE Transactions on Circuits and Systems I:Fundamental Theory and Applications, vol. 41,No. 12, pp. 941-944, 1994.##[10] T. Suetsugu and M. K. Kazimierczuk,“Comparison of class-E amplifier with##nonlinear and linear shunt capacitance”, IEEE Transactions on Circuits and Systems I:Fundamental Theory and Applications, vol. 50,No. 8, pp. 1089-1097, 2003.##[11] M. Hayati, A. Lotfi, M. K. Kazimierczuk, andH. Sekiya, “Generalized Design Considerations##and Analysis of Class-E Amplifier forSinusoidal and Square Input VoltageWaveforms”, IEEE Transactions on IndustrialElectronics, vol. 62, No. 1, pp. 211-220, 2015.##[12] P. Alinikula, K. Choi, and S. Long, “Design of class E power amplifier with nonlinear parasitic output capacitance”, IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, vol. 46, No. 2, pp. 114-119, 1999.##T. Suetsugu and M. K. Kazimierczuk, “Analysis and design of class E amplifier with shunt capacitance composed of nonlinear and linear capacitances”, IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 51, No. 7, pp. 1261-1268, 2004.##T. Suetsugu and M. K. Kazimierczuk, “Maximum operating frequency of class-E amplifier at any duty ratio”, IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 8, No. 55, pp. 768-770, 2008.##M. Hayati, A. Lotfi, M. K. Kazimierczuk, and H. Sekiya, “Analysis and design of class-E power amplifier with MOSFET parasitic linear and nonlinear capacitances at any duty ratio.” IEEE Transactions on Power Electronics, vol. 28, No. 11, pp. 5222-5232. 2013.##X. Wei, H. Sekiya, S. Kuroiwa, T. Suetsugu, and M.K. Kazimierczuk, “Design of class-E amplifier with MOSFET linear gate-to-drain and nonlinear drain-to-source capacitances”, IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 58, No. 10, pp. 2556-2565. 2011.##T. Suetsugu and M. K. Kazimierczuk, “Voltage-clamped class E amplifier with a Zener diode across the switch”, in IEEE International Symposium on Circuits and Systems, ISCAS, pp. IV-361, 2002.##T. Suetsugu and M. K. Kazimierczuk, “Lossless voltage-clamping of a class E amplifier with a transformer and a diode.” in International Symposium on Circuits and Systems, ISCAS, pp. III-276, 2003.##T. Mury, and V. F. Fusco, “Sensitivity characteristics of inverse Class-E power amplifier”, IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 54, No. 4, pp. 768-778, 2007.##P. Chen, and S. He, “Investigation of Inverse Class-E Power Amplifier at Sub-Nominal Condition for Any Duty Ratio.” IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 62, No. 4, pp. 1015-1024. 2015.##Z. Kaczmarczyk, “High efficiency class E, E/F2 and E/F inverters”, IEEE Transactions on Industrial Electronics, vol. 53, pp. 1584–1593, 2006.##A. Grebennikov, “High-efficiency Class E/F lumped and transmission-line power amplifiers”, IEEE Transactions on Microwave Theory and Techniques, vol. 59, No. 6, pp.##1579-1588. 2011.##T. Mury, and V. F. Fusco, “Inverse Class-E amplifier with transmission-line harmonic suppression”, IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 54, No. 7, pp. 1555-1561, 2007.##F. You, S. He, X. Tang, and X. Deng, “The effects of limited drain current and on resistance on the performance of an LDMOS inverse class-E power amplifier”, IEEE Transactions on Microwave Theory and Techniques, vol. 57, No. 2, pp. 336-343, 2009.##T. Suetsugu and M. K. Kazimierczuk, “Design procedure of class-E amplifier for off-nominal operation at 50% duty ratio”, IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 53, No. 7, pp. 1468-1476, 2006.##M. Hayati, A. Lotfi, M. K. Kazimierczuk, and H. Sekiya, “Performance study of class-E power amplifier with a shunt inductor at subnominal condition”, IEEE Transactions on Power Electronics, vol. 28, No. 8, pp. 3834-3844, 2013.##A. Mediano and N. O. Sokal, “A Class-RF Power Amplifier with a Flat-Top Transistor-Voltage Waveform”, IEEE Transactions on Power Electronics, vol. 28, No. 11, pp. 5215-5221, 2013.##F. Y. Chen, J. F. Chen, and R. L. Lin, “Low-harmonic push–pull Class-E power amplifier with a pair of LC resonant networks”, IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 54, No. 3, pp. 579-589, 2007.##H. Kobayashi, J. M. Hinrichs, and P. M. Asbeck, “Current-mode class-D power amplifiers for high-efficiency RF applications”, IEEE Transactions on Microwave Theory and techniques, vol. 49. No. 12, pp. 2480-2485. 2001.##T. P. Hung, A. G. Metzger, P. J. Zampardi, M. Iwamoto, and P. M. Asbeck, “Design of high-efficiency current-mode class-D amplifiers for wireless handsets”, IEEE Transactions on Microwave Theory and Techniques, vol. 53, No. 1, pp. 144-151. 2005.##]
Filtering Power Divider/Combiner Based on Half Mode Substrate Integrated Waveguide (HMSIW) Technology for High Power Applications
Filtering Power Divider/Combiner Based on Half Mode Substrate Integrated Waveguide (HMSIW) Technology for High Power Applications
2
2
A filtering power divider/power combiner based on half mode substrate integrated waveguide technology for high power applications is proposed. This design includes one half mode substrate integrated waveguide cavity, one matched load, and four sections of quarter-wavelength transmission lines. The high isolation between output ports is obtained by combining the half mode substrate integrated waveguide cavity and microstrip network (one matched load and four sections of quarter-wavelength transmission lines). This structure utilizes for high power applications because of the matched load is connected to ground. The design is fabricated and tested by network analyzer. A good agreement between the simulated and measured results is observed. The measured results show that for a return loss of 15 dB, the bandwidth is from 5.15 to 5.35 GHz (IEEE 802.11a wireless local area network (WLAN) standard) and over this whole bandwidth, the output return loss and isolation between output ports are better than 14.5 dB and 17.5 dB, respectively. Also, the measured insertion loss is dB.
1
A filtering power divider/power combiner based on half mode substrate integrated waveguide technology for high power applications is proposed. This design includes one half mode substrate integrated waveguide cavity, one matched load, and four sections of quarter-wavelength transmission lines. The high isolation between output ports is obtained by combining the half mode substrate integrated waveguide cavity and microstrip network (one matched load and four sections of quarter-wavelength transmission lines). This structure utilizes for high power applications because of the matched load is connected to ground. The design is fabricated and tested by network analyzer. A good agreement between the simulated and measured results is observed. The measured results show that for a return loss of 15 dB, the bandwidth is from 5.15 to 5.35 GHz (IEEE 802.11a wireless local area network (WLAN) standard) and over this whole bandwidth, the output return loss and isolation between output ports are better than 14.5 dB and 17.5 dB, respectively. Also, the measured insertion loss is dB.
39
45
A. R.
Moznebi
A. R.
Moznebi
MSc Student, Department of Electrical Engineering, Shahid Bahonar University of Kerman, Kerman, Iran
MSc Student, Department of Electrical Engineering,
Iran
K.
Afrooz
K.
Afrooz
Assistant Professor, Department of Electrical Engineering, Shahid Bahonar University of Kerman, Kerman, Iran
Assistant Professor, Department of Electrical
Iran
Filtering Power Divider
Half Mode Substrate Integrated Waveguide (HMSIW)
Power Combiner
Power Divider
[[1] Z. Hao, W. Hong, H. Li, H. Zhang, and K. Wu,“Multiway broadband substrate integrated##waveguide (SIW) power divider”, In IEEE Antennas and Propagation Society Int. Symp.,pp. 639-642, 2005.##[2] H. Uchimura, T. Takenoshita, and M. Fujii,“Development of a “laminated waveguide””,##IEEE Trans. Microw. Theory Tech., vol. 46, no.12, pp. 2438-2443, November, 1998.##[3] L. Yan, W. Hong, K. Wu, and T. J. Cui,“Investigations on the propagation characteristics##of the substrate integrated waveguide based onthe method of lines”, IET Microw. Antennas##Prop., vol. 152, no. 1, pp. 35-42, February, 2005.##[4] M. Bozzi, A. Georgiadis, and K. Wu, “Review of substrate-integrated waveguide circuits and##antennas”, IET Microw. Antennas Prop., vol. 5,no. 8, pp. 909-920, June, 2011.##[5] W. Hong, B. Liu, Y. Wang, Q. Lai, H. Tang, X.X. Yin, Y. D. Dong, Y. Zhang, and K. Wu, “Half##mode substrate integrated waveguide: A new guided wave structure for microwave and##millimeter wave application”, In Infrared Millimeter Waves and 14th International##Conference on Teraherz Electronics, Shanghai,pp. 219-219, 2006.##[6] E. J. Wilkinson, “An N-way hybrid power divider”, IRE Trans. Microw. Theory Tech., vol.##8, no. 1, pp. 116-118, January, 1960.##[7] K. K. M. Cheng, and P. W. Li, “novel powerdivider design with unequal power-dividing ratio##and simple layout”, IEEE Trans. Microw. Theory Tech., vol. 57, no. 6, pp. 1589-1594, May, 2009.##[8] H. R. Ahn, and I. Wolff, “Ahn, H. R., & Wolff,I. (2001). General design equations, small-sized##impedance transformers, and their application to small-sized three-port 3-dB power dividers”,##IEEE Trans. Microw. Theory Tech., vol. 49, no.7, pp. 1277-1288, July, 2001.##[9] M. J. Park, and B. Lee, “A dual-band Wilkinson power divider”, IEEE Microw. Wirel. Compon.##Lett., Vol. 18, no. 2, pp. 85-87, February, 2008.##[10] U. H. Gysel, “A new N-way power divider/combiner suitable for high-power##applications”, In IEEE Microw. Symposium,Palo Alton, CA, pp. 116-118, 1975.##[11] S. Y. Chen, D. S. Zhang, and Y. T. Yu,“Wideband SIW power divider with improved##out-of-band rejection”, Electron. Lett., vol. 49,no. 15, pp. 943-944, July, 2013.##[12] T. Li, and W. Dou, “Broadband substrateintegrated waveguide T-junction with arbitrary##power-dividing ratio”, Electron. Lett., vol. 51,no. 3, pp. 259-260, February, 2015.##[13] X. Zou, C. M. Tong, and D. W. Yu, “Y-junction power divider based on substrate integrated##waveguide”, Electron. Lett., vol. 47, no. 25, pp.##1375-1376, December, 2011.##[14] N. Smith, and R. Abhari, “Compact substrate integrated waveguide Wilkinson power##dividers”, In IEEE Antennas and PropagationSociety Int. Symp., Charleston, SC, pp. 1-4,2009.##[15] Z. Y. Zhang, and K. Wu, “Broadband half-mode substrate integrated waveguide (HMSIW)##Wilkinson power divider”, In IEEE Microw.Symposium Digest, Atlanta, GA, pp. 879-882,2008.##[16] D. M. Pozar, Microwave Engineering. Wiley,2011.##[17] F. Xu, and K. Wu, “Guided-wave and leakage characteristics of substrate integrated##waveguide”, IEEE Trans. Microw. Theory Tech.,vol. 53, no. 1, pp. 66-73, January, 2005.##[18] J. E. Rayas-Sánchez, and V. Gutierrez-Ayala, “A general EM-based design procedure for singlelayer##substrate integrated waveguide interconnects with microstrip transitions”, In IEEE Microw. Symposium Digest, Atlanta, GA,pp. 983-986, 2008.##[19] K. Wu, D. Deslandes, and Y. Cassivi, “The substrate integrated circuits-a new concept for##high-frequency electronics and optoelectronics”,In Telecommunications in Modern Satellite, Cable and Broadcasting Service, pp. P-III, 2003.##A. Abbosh, and B. Henin, “Planar wideband inphase power divider/combiner using modified Gysel structure”, IET Microw. Antennas Prop., Vol. 7, no. 10, pp. 783-787, July, 2013.##J. N. Hui, W. J. Feng, and W. Q. Che, “Balun bandpass filter based on multilayer substrate integrated waveguide power divider”, Electron. Lett., vol. 48, no. 10, pp. 571-573, May, 2012.##U. Rosenberg, M. Salehi, J. Bornemann, and E. Mehrshahi, “A novel frequency-selective power combiner/divider in single-layer substrate integrated waveguide technology”, IEEE Microw. Wirel. Compon. Lett., vol. 23, no. 8, pp. 406-408, June, 2013.##]
Eigenvalue calculator for Islanded Inverter-Based Microgrids
Eigenvalue calculator for Islanded Inverter-Based Microgrids
2
2
The stability analysis of islanded inverter-based microgrids (IBMGs) is increasingly an important and challenging topic due to the nonlinearity of IBMGs. In this paper, a new linear model for such microgrids as well as an iterative method to correct the linear model is proposed. Using the linear model makes it easy to analyze the eigenvalues and stability of IBMGs due to the fact that it derives the eigenvalues directly and the linearization around an operating point to study the small signal stability and also use the newton-raphson method or other load flow solutions to solve these systems are no longer needed. An effective eigenvalue calculator is developed which is able to calculate the eigenvalues of IBMGs in the first few iterations of the proposed method. The proposed method provides the superior performance considering the simulation time compared to the conventional methods. The validation and comparison of the results show the performance of the proposed method.
1
The stability analysis of islanded inverter-based microgrids (IBMGs) is increasingly an important and challenging topic due to the nonlinearity of IBMGs. In this paper, a new linear model for such microgrids as well as an iterative method to correct the linear model is proposed. Using the linear model makes it easy to analyze the eigenvalues and stability of IBMGs due to the fact that it derives the eigenvalues directly and the linearization around an operating point to study the small signal stability and also use the newton-raphson method or other load flow solutions to solve these systems are no longer needed. An effective eigenvalue calculator is developed which is able to calculate the eigenvalues of IBMGs in the first few iterations of the proposed method. The proposed method provides the superior performance considering the simulation time compared to the conventional methods. The validation and comparison of the results show the performance of the proposed method.
47
60
A.
Mahmoudi
A.
Mahmoudi
Iran
S. H.
Hosseinian
S. H.
Hosseinian
Iran
M.
Kosari
M.
Kosari
Iran
Inverter-based microgrids
Stability Analysis
Eigenvalue calculator
Linear models
State-space model
[[1] R.H.Lasseter, microgrids and distributed Generation. Journal of Energy Engineering, 133(2007),144-149. ##[2]IEEE P1547 standard for Distributed Resources Interconnected with Electric power systems, IEEE P1547 std.,sep. 2002 ##[3] F. Katiraei, M. R. Iravani, and P. W. Lehn, Micro-grid Autonomous Operation During and Subsequent to Islanding Process, IEEE Trans. On Power Delivery, 20(2005) 248-257.##[4] Gao, M., Chen, M., Jin Ch., Guerrero, J. M., Qian, Zh. M., 2013. Analysis, design, and experimental evaluation of power calculation in digital droop-controlled parallel microgrid inverters. Journal of Zhejiang University SCIENCE C, 14(1): 50-64.##[5] B. Bahrani, H. Karimi, R. Iravani, Decentralized Control of Parallel Connection of Two Distributed Generation Units, Industrial Electronics, 2009. IECON '09. 35th Annual Conference of IEEE, 2009, 358-362.##[6] N. Cai, J. Mitra, A multi-level control architecture for master-slave organized microgrids with power electronic interfaces, Electric Power Systems Research, 109 (2014), 8–19.##[7] F. Gao and R. Iravani, “A Control Strategy for a Distributed Generation Unit in Grid-Connected and Autonomous Modes of Operation,” Power Delivery, IEEE Trans., vol. 23, no. 2, pp. 850 –859, Apr 2008.##[8] F. Katiraei, and M. R. Iravani, “Power Management Strategies for a Microgrid with Multiple Distributed Generation Units,” Power Systems IEEE Trans., vol. 21, no. 4, pp. 1821-1831, Nov. 2006.##[9] Vandoorn T. L., Renders B., Degroote L., Meersman B., Vandevelde L., “Active Load Control in Islanded Microgrids Based on the Grid Voltage” Smart Grid, IEEE Trans. Vol.2, no. 1, pp. 139-151, Mar. 2013.##[10] N. Pogaku, M. Prodanovic, and T. C. Green, “Modeling, Analysis and Testing of Autonomous Operation of an Inverter-Based Microgrid,” Power Electronics IEEE Trans., vol. 22, no. 2, pp. 613–625, Mar. 2007.##[11] N. Bottrell, M. Prodanovic, T. C. Green, “Dynamic Stability of a Microgrid with an Active Load” Power Electronics IEEE Trans., Vol. 28, no. 11, pp. 5107 – 5119, Nov. 2013.##[12] H. Ch. Chiang, Chi‐Yung Yen and K. T. Chang, “A frequency‐dependent droop scheme for parallel control of ups inverters” Journal of the Chinese Institute of Engineers, Vol. 24, No. 6, pp. 699-708, 2001##[13] E. Barklund, N. Pogaku, M. Prodanovic, C. Hernandez-Aramburo, and T. Green, “Energy Management in Autonomous Microgrid Using Stability-Constrained Droop Control of Inverters” Power Electronics, IEEE Trans., vol. 23, no. 5, pp. 2346 –2352, Sept 2008.##[14] Seidi Khorramabadi, S, Bakhshai, A, “Critic-Based Self-Tuning PI Structure for Active and Reactive Power Control of VSCs in Microgrid Systems” Smart Grid, IEEE Trans. Vol. 6, No. 1, pp. 92-103, Jan. 2015.##[15] J. Vasquez, J. Guerrero, A. Luna, P. Rodriguez, and R. Teodorescu, “Adaptive Droop Control Applied to Voltage-Source Inverters Operating in Grid-Connected and Islanded Modes,” IEEE Trans. Industrial Electronics, vol. 56, no. 10, pp. 4088 –4096, Oct 2009.##[16] Bevrani, H., Shokoohi S., “An Intelligent Droop Control for Simultaneous Voltage and Frequency Regulation in Islanded Microgrids” Smart Grid, IEEE Trans. Vol. 4, No. 3, pp. 1505-1513, Sept. 2013.##[17] Savaghebi, M., Jalilian, A., Vasquez, J.C., Guerrero, J. M., “Secondary Control Scheme for Voltage Unbalance Compensation in an Islanded Droop-Controlled Microgrid” Smart Grid, IEEE Trans. Vol. 3, No. 2, pp. 797-807, June 2012.##[18] Laghari, J. A., Mokhlis, H., Karimi, M., Bakar, A. H. A., Hasmaini M., 2015. A new technique for islanding operation of distribution network connected with mini hydro. Frontiers of Information Technology & Electronic Engineering. 16(5):418-427.##[19] J. Kim, J. Guerrero, P. Rodriguez, R. Teodorescu, and K. Nam, “Mode Adaptive Droop Control With Virtual Output Impedances for an Inverter-Based Flexible AC Microgrid,” Power Electronics, IEEE Trans on, vol. 26, no. 3, pp. 689 –701, Mar 2011.##[20] M. Hua, H. Hu, Y. Xing, and J. Guerrero, “Multilayer Control for Inverters in Parallel Operation Without Intercommunications,” IEEE Trans. Power Electronics, vol. 27, no. 8, pp. 3651 –3663, Aug 2012.##[21] Z. Zeng, H. Yang, R. Zhao, Study on small signal stability of microgrids: A review and a new approach, Renewable and Sustainable Energy Reviews, 15 (2011) 4818–4828.##[22] M. Marwali, J.-W. Jung, and A. Keyhani, Stability Analysis of Load Sharing Control for Distributed Generation Systems, Energy Conversion, IEEE Trans., 22 (2007) 737–745.##[23] S. Iyer, M. Belur, and M. Chandorkar, A Generalized Computational Method to Determine Stability of a Multi-inverter Microgrid, Power Electronics, IEEE Trans., 25 (2010) 2420–2432.##[24] N. Jayawarna, X. Wu, Y. Zhang, N. Jenkins, and M. Barnes, Stability of a Microgrid, The 3rd IET International Conference on Power Electronics, Machines and Drives, (2006) 316–320.##[25] Johnson B.B., Davoudi A., Chapman P.L., Sauer P., Microgrid dynamics characterization using the automated state model generation algorithm, Proceedings of 2010 IEEE International Symposium on Circuits and Systems (2010) 2758 – 2761.##[26] Chakraborty S., Simões M. G., Kramer, W. E., Power Electronics for Renewable and Distributed Energy Systems: A Sourcebook of Topologies, Control and Integration, Springer London, Green Energy and Technology (2013) 483-484.##]